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[QUOTE="Queen, post: 85842, member: 27"]
Zen 6 crams way more cores into basically the same silicon footprint, flexing TSMC N2 density hard.

Zen 6 CCD size and core jump
[LIST]
[*]Advanced Micro Devices is keeping the CCD size near the prior designs.
[*]Landing around 76 mm2, barely bigger than Zen 4 or Zen 5.
[*]Jumping to 12 cores per CCD.
[*]Packing 48 MB L3 cache per chiplet.
[/LIST]
Process tech doing the heavy lifting
[LIST]
[*]Built on TSMC N2 NanoSheet tech.
[*]Squeezing 50% more cores without ballooning the die area.
[*]Scaling cache density alongside compute.
[*]Showing how aggressive 2 nm really is.
[/LIST]
Product segmentation details
[LIST]
[*]EPYC Venice gets first crack at N2.
[*]The full Zen 6 lineup relies on N2P.
[*]IOD sticks with N3P.
[*]Cheaper SKUs still fall back to N3P.
[/LIST]
Zen 6C takes it further
[LIST]
[*]The bigger variant doubles down on density.
[*]Growing to roughly 156 mm2.
[*]Stuffing 32 cores inside one CCD.
[*]Boosting L3 cache to 128 MB.
[/LIST]
Platform-level expectations
[LIST]
[*]Desktop and server parts scale past eight cores per CCD.
[*]Chasing higher IPC gains.
[*]Clocks are expected to climb with node improvements.
[*]X3D V-Cache lines up for another generation upgrade.
[/LIST]
[/QUOTE]

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