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Message: [QUOTE="Queen, post: 84865, member: 27"] MediaTek went old-core, max-cache mode, and now everyone is squinting at benchmarks, wondering if brute memory tricks can outplay newer silicon. Baseline comparison setup [LIST] [*]LPDDR5x RAM and UFS 4 plus MCQ are on the table, setting a modern baseline before anything spicy even starts. [*]The comparison exists purely to frame expectations, not to crown a winner yet. [/LIST] Qualcomm Snapdragon 8 Gen 5 snapshot [LIST] [*]Qualcomm is rolling out the Snapdragon 8 Gen 5 with a very traditional top-end flex. [*]Two third-gen Oryon high-performance cores are pushing 3.80GHz, while six medium-performance Oryon cores cruise at 3.32GHz. [*]Adreno 840 shows up with ray tracing, because of course it does. [*]TSMC handles the 3nm N3P process, keeping things cutting-edge. [*]Qualcomm Hexagon NPU brings agentic AI support into the mix. [*]LPDDR5x RAM and UFS 4.1 storage round out the expected flagship checklist. [/LIST] Where MediaTek zagged [LIST] [*]MediaTek clearly noticed the same weak spot that haunted the Google Tensor G5. [*]Older ARM generic CPU cores dragged performance down, especially when compared to chips using ARM's latest-generation cores. [*]That gap helps explain why the Dimensity 9500 looked stronger than Tensor G5 in raw performance terms. [/LIST] The Dimensity 9500s twist [LIST] [*]The Dimensity 9500s quietly stepped back a generation on ARM CPU cores compared to the Dimensity 9500. [*]Newer cores usually win, full stop, when raw speed and efficiency are the game. [*]Instead of chasing that rule, MediaTek threw silicon at the problem in a different direction. [/LIST] Cache over cores strategy [LIST] [*]The Dimensity 9500s shows up with a largest-in-class 19MB CPU cache, which is not subtle. [*]L3 cache lands at 12MB, and System Level Cache stacks another 10MB on top. [*]The whole move feels like a deliberate attempt to brute-force efficiency without bleeding-edge cores. [/LIST] Why does cache even matters [LIST] [*]CPU cache exists to shield processor cores from slow RAM, which everyone forgets until power draw spikes. [*]Frequently used data stays on-die, cutting latency and trimming power consumption. [*]A bigger cache means fewer expensive trips out to RAM, at least in theory. [/LIST] Waiting on the numbers [LIST] [*]Serious benchmark data for the Dimensity 9500s is not public yet, so speculation is doing all the heavy lifting. [*]The real question is how much that massive cache can compensate for older CPU cores in daily workloads. [/LIST] Big-picture takeaway [LIST] [*]MediaTek deserves credit for trying something unconventional instead of chasing specs for bragging rights. [*]If this works, older-gen cores paired with oversized cache could become the go-to move against DRAM-driven cost inflation, especially outside true flagship chips. [/LIST] [/QUOTE]

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