Tachyum rolled out specs for its open source TDIMM memory standard that supposedly cranks bandwidth up by 5.5 times compared to regular DDR5 RDIMMs. The new modules jump from 51 GB/s to 281 GB/s while offering capacities ranging from 256 GB in standard height all the way to 1 TB in extra tall form factors. The company says their design needs 38 percent more signals but delivers double the bandwidth with 10 percent fewer DRAM chips, which they claim cuts costs.
The memory uses a 484-pin connector instead of the typical 288 pins found on current RDIMMs and supports 128-bit data paths with 16-bit ECC. Tachyum CEO Radoslav Danilak talked up how the tech could slash AI datacenter expenses from trillions down to billions by 2028, when theoretical bandwidth could hit 27 TB/s. Whether this actually ships beyond a press release remains to be seen.
The memory uses a 484-pin connector instead of the typical 288 pins found on current RDIMMs and supports 128-bit data paths with 16-bit ECC. Tachyum CEO Radoslav Danilak talked up how the tech could slash AI datacenter expenses from trillions down to billions by 2028, when theoretical bandwidth could hit 27 TB/s. Whether this actually ships beyond a press release remains to be seen.
