TSMC plans to use standard 0.33-NA EUV tools for its future A14 chip manufacturing instead of High-NA EUV technology. The company wants to keep production simple and costs down, according to Senior Vice President Kevin Zhang. Mass production will start in 2028, with TSMC confident it can meet all targets through the two-nanometer generation without High-NA equipment. The chip maker aims to limit mask layers between generations, offering cheaper solutions for customers without cutting important features.
This approach matches Intel Foundry and several DRAM makers who use High-NA just for critical parts. High-NA EUV machines cost $380 million each and need stronger exposure doses with slower output than regular tools. IBM researchers found that one High-NA exposure costs up to 2.5 times more than a standard shot. But when comparing a four-mask standard process against a single High-NA run, total wafer costs can drop between 1.7 and 2.1 times. Experts predict full cost balance will happen around 2030. Intel remains the only major foundry fully committed to High-NA for large-scale production, having already tested over 30,000 wafers on its 14A node with ASML Twinscan EXE:5000 High-NA equipment.
This approach matches Intel Foundry and several DRAM makers who use High-NA just for critical parts. High-NA EUV machines cost $380 million each and need stronger exposure doses with slower output than regular tools. IBM researchers found that one High-NA exposure costs up to 2.5 times more than a standard shot. But when comparing a four-mask standard process against a single High-NA run, total wafer costs can drop between 1.7 and 2.1 times. Experts predict full cost balance will happen around 2030. Intel remains the only major foundry fully committed to High-NA for large-scale production, having already tested over 30,000 wafers on its 14A node with ASML Twinscan EXE:5000 High-NA equipment.
